25#ifndef LIBSWITCHTEC_MFG_H
26#define LIBSWITCHTEC_MFG_H
28#define SWITCHTEC_MB_LOG_LEN 32
30#define SWITCHTEC_PUB_KEY_LEN 512
31#define SWITCHTEC_SIG_LEN 512
32#define SWITCHTEC_UDS_LEN 32
33#define SWITCHTEC_KMSK_LEN 64
34#define SWITCHTEC_KMSK_NUM_MAX 10
35#define SWITCHTEC_KMSK_NUM_GEN6 12
36#define SWITCHTEC_KMSK_LEN_DWORDS (SWITCHTEC_KMSK_LEN / 4)
37#define SWITCHTEC_GEN6_TOKEN_LEN 88
39#define SWITCHTEC_UID_LEN_DWORDS 16
40#define SWITCHTEC_PSID_LEN_DWORDS 4
42#define OTP_MULTI_DWORD_UID_UNIQUEID_DWORDS 16
43#define OTP_MULTI_DWORD_CUSTOMER_PSID0_DWORDS 4
45#define SWITCHTEC_SECURITY_SPI_RATE_MAX_NUM 16
47#define SWITCHTEC_UID_DWORD_S 16
48#define SWITCHTEC_PSID_DWORD_S 4
50#define OTP_MULTI_DWORD_IMAGE_BIAK0 656
52#define OTP_DWORD_10 10
54#define OTP_DWORD_0_PRODUCT_SECSC_LSB 22
55#define OTP_DWORD_0_PRODUCT_SECSC_MSK 0x00400000
57#define OTP_DWORD_10_SMBUS_SMBRMRPCADDR_LSB 0
58#define OTP_DWORD_10_SMBUS_SMBRMRPCADDR_MSK 0x000003FF
59#define OTP_DWORD_10_SMBUS_SMBRIF_LSB 10
60#define OTP_DWORD_10_SMBUS_SMBRIF_MSK 0x00000C00
61#define OTP_DWORD_10_SMBUS_SMBRATYPE_LSB 12
62#define OTP_DWORD_10_SMBUS_SMBRATYPE_MSK 0x00003000
63#define OTP_DWORD_10_SMBUS_SMBROCPADDR_LSB 18
64#define OTP_DWORD_10_SMBUS_SMBROCPADDR_MSK 0x0FFC0000
66#define SECIRE_CFG_GET_I2C (0xD4>>1)
67#define SECURE_CFG_GET_OCP (0xD2>>1)
69#define SECURE_CFG_GET_I2C_PORT_MSK 0x00000003
70#define SECURE_CFG_GET_I2C_PORT_LSB 0x0000000A
71#define SECURE_CFG_GET_I2C_ADDR_MSK 0x000003FF
72#define SECURE_CFG_GET_I2C_CMD_MAP_MSK 0x00000FFF
73#define SECURE_CFG_GET_I2C_CMD_MAP_LSB 0x0000000C
74#define SECURE_CFG_GET_I2C_RCVRY_INF_MSK 0x0000C000
75#define SECURE_CFG_GET_I2C_RCVRY_ADDR_MSK 0x000003FF
82 uint32_t ver_sec_unlock;
87 uint32_t PSID_UID_valid_flags;
88 uint32_t dbg_tok_sec_ver_rsvrd;
89 uint32_t kmt_sec_ver_rsvrd;
91enum switchtec_debug_mode {
92 SWITCHTEC_DEBUG_MODE_ENABLED,
93 SWITCHTEC_DEBUG_MODE_DISABLED_BUT_ENABLE_ALLOWED,
94 SWITCHTEC_DEBUG_MODE_DISABLED,
95 SWITCHTEC_DEBUG_MODE_DISABLED_EXT
98enum switchtec_secure_state {
99 SWITCHTEC_UNINITIALIZED_UNSECURED,
100 SWITCHTEC_INITIALIZED_UNSECURED,
101 SWITCHTEC_INITIALIZED_SECURED,
102 SWITCHTEC_SECURE_STATE_UNKNOWN = 0xff,
105enum switchtec_secure_state_gen6 {
106 SWITCHTEC_GEN6_UNINITIALIZED_SECURE_CAPABLE = 0,
107 SWITCHTEC_GEN6_UNPROVISIONED_SECURED = 1,
108 SWITCHTEC_GEN6_INITIALIZED_SECURED = 2,
109 SWITCHTEC_GEN6_INITIALIZED_UNSECURED = 3,
110 SWITCHTEC_GEN6_SECURE_STATE_UNKNOWN = 0xff,
113enum switchtec_attestation_mode {
114 SWITCHTEC_ATTESTATION_MODE_NOT_SUPPORTED,
115 SWITCHTEC_ATTESTATION_MODE_NONE,
116 SWITCHTEC_ATTESTATION_MODE_DICE
122enum switchtec_otp_program_status {
123 SWITCHTEC_OTP_PROGRAMMABLE = 0,
124 SWITCHTEC_OTP_UNPROGRAMMABLE = 1,
127enum switchtec_otp_program_mask {
128 SWITCHTEC_OTP_UNMASKED = 0,
129 SWITCHTEC_OTP_MASKED = 1,
134 bool mixed_ver_valid;
135 bool main_fw_ver_valid;
136 bool sec_unlock_ver_valid;
138 enum switchtec_otp_program_status basic;
139 enum switchtec_otp_program_status mixed_ver;
140 enum switchtec_otp_program_status main_fw_ver;
141 enum switchtec_otp_program_status sec_unlock_ver;
142 enum switchtec_otp_program_status kmsk[4];
147 bool debug_mode_valid;
151 bool main_fw_ver_valid;
152 bool sec_unlock_ver_valid;
154 bool cdi_efuse_inc_mask_valid;
158 bool mchp_uds_mask_valid;
159 bool did_cert0_valid;
160 bool did_cert1_valid;
161 enum switchtec_otp_program_status basic;
162 enum switchtec_otp_program_status debug_mode;
163 enum switchtec_otp_program_status key_ver;
164 enum switchtec_otp_program_status rc_ver;
165 enum switchtec_otp_program_status bl2_ver;
166 enum switchtec_otp_program_status main_fw_ver;
167 enum switchtec_otp_program_status sec_unlock_ver;
168 enum switchtec_otp_program_status kmsk[10];
169 enum switchtec_otp_program_status cdi_efuse_inc_mask;
170 enum switchtec_otp_program_status uds;
171 enum switchtec_otp_program_mask uds_mask;
172 enum switchtec_otp_program_status mchp_uds;
173 enum switchtec_otp_program_mask mchp_uds_mask;
174 enum switchtec_otp_program_status did_cert0;
175 enum switchtec_otp_program_status did_cert1;
179 enum switchtec_attestation_mode attestation_mode;
180 bool cdi_efuse_inc_mask_valid;
181 unsigned int cdi_efuse_inc_mask;
184 unsigned char uds_data[32];
188 bool debug_mode_valid;
189 uint8_t basic_setting_valid;
190 uint8_t public_key_exp_valid;
191 uint8_t public_key_num_valid;
192 uint8_t public_key_ver_valid;
193 uint8_t public_key_valid;
195 enum switchtec_debug_mode debug_mode;
196 enum switchtec_secure_state secure_state;
198 uint8_t jtag_lock_after_reset;
199 uint8_t jtag_lock_after_bl1;
200 uint8_t jtag_bl1_unlock_allowed;
201 uint8_t jtag_post_bl1_unlock_allowed;
204 uint32_t i2c_recovery_tmo;
207 uint32_t i2c_cmd_map;
208 uint32_t public_key_exponent;
209 uint32_t public_key_num;
210 uint32_t public_key_ver;
212 uint8_t public_key[SWITCHTEC_KMSK_NUM_MAX][SWITCHTEC_KMSK_LEN];
215 uint16_t i2c_rcvry_address_ocp;
216 uint32_t otp_key_hash[SWITCHTEC_KMSK_NUM_GEN6][SWITCHTEC_KMSK_LEN_DWORDS];
228 uint32_t twi_rcvry_address_mrpc :10;
229 uint32_t twi_rcvry_bus :2;
230 uint32_t twi_address_type :2;
231 uint32_t twi_rcvry_address_ocp :10;
232 uint32_t reserved_dw_0_1 :8;
235 uint32_t mrpc_command_map :12;
237 uint32_t reserved_dw_1_1 :19;
240 uint32_t ap_offset :20;
241 uint32_t reserved_dw_2_1 :12;
244 uint32_t i3c_pid_high :32;
247 uint32_t i3c_pid_low :32;
250 uint32_t i3c_rcvry_address :7;
251 uint32_t i3c_rcvry_bus :2;
252 uint32_t reserved_dw_5_1 :23;
255 uint32_t algo_crc_disable :1;
256 uint32_t algo_ecdsa_p384_disable :1;
257 uint32_t algo_ecdsa_p521_disable :1;
258 uint32_t algo_rsa3ksha2_disable :1;
259 uint32_t algo_rsa4ksha2_disable :1;
260 uint32_t algo_dilithium5_disable :1;
261 uint32_t reserved_dw_6_1 :2;
262 uint32_t rom_key_1_disable :1;
263 uint32_t rom_key_2_disable :1;
264 uint32_t rom_key_3_disable :1;
265 uint32_t rom_key_4_disable :1;
266 uint32_t reserved_dw_6_2 :4;
267 uint32_t boot_from_uart_disable :1;
268 uint32_t boot_from_smbus_disable :1;
269 uint32_t boot_from_i3c_disable :1;
270 uint32_t failover_to_uart_disable :1;
271 uint32_t failover_to_smbus_disable :1;
272 uint32_t failover_to_i3c_disable :1;
273 uint32_t reserved_dw_6_3 :2;
274 uint32_t static_token_disable :1;
275 uint32_t psid_only_token_disable :1;
276 uint32_t uid_only_token_disable :1;
277 uint32_t psid_uid_token_disable :1;
278 uint32_t reserved_dw_6_4 :4;
281 uint32_t puf_ac_status :2;
282 uint32_t rsvd_dw_7_0 :2;
283 uint32_t otp_key0_hash_status :2;
284 uint32_t otp_key1_hash_status :2;
285 uint32_t otp_key2_hash_status :2;
286 uint32_t otp_key3_hash_status :2;
287 uint32_t otp_key4_hash_status :2;
288 uint32_t otp_key5_hash_status :2;
289 uint32_t otp_key6_hash_status :2;
290 uint32_t otp_key7_hash_status :2;
291 uint32_t otp_key8_hash_status :2;
292 uint32_t otp_key9_hash_status :2;
293 uint32_t otp_key10_hash_status :2;
294 uint32_t otp_key11_hash_status :2;
295 uint32_t rsvd_dw_7_1 :4;
298 uint32_t rsvd_dw_8_0 :24;
299 uint32_t has_table_sha2_384_disable :1;
300 uint32_t has_table_sha2_512_disable :1;
301 uint32_t has_table_sha3_512_disable :1;
302 uint32_t has_table_crc32_disable :1;
303 uint32_t reserved_dw_8_1 :4;
306 uint32_t otp_key_hash[SWITCHTEC_KMSK_NUM_GEN6][SWITCHTEC_KMSK_LEN_DWORDS];
312enum kmt_signature_types_e {
313 KMT_SIG_FORMAT_CRC = 0,
314 KMT_SIG_FORMAT_RSA3KSHA2 = 1,
315 KMT_SIG_FORMAT_RSA4KSHA2 = 2,
316 KMT_SIG_FORMAT_ECDSAP384SHA2 = 3,
317 KMT_SIG_FORMAT_ECDSAP521SHA2 = 4,
318 KMT_SIG_FORMAT_DILITHIUM5 = 5,
322enum switchtec_otp_key_status {
330 enum switchtec_attestation_mode attestation_mode;
331 unsigned int cdi_efuse_inc_mask;
334 unsigned char uds_data[32];
338 uint8_t jtag_lock_after_reset;
339 uint8_t jtag_lock_after_bl1;
340 uint8_t jtag_bl1_unlock_allowed;
341 uint8_t jtag_post_bl1_unlock_allowed;
344 uint32_t i2c_recovery_tmo;
347 uint32_t i2c_cmd_map;
348 uint32_t public_key_exponent;
353enum switchtec_active_index_id {
354 SWITCHTEC_ACTIVE_INDEX_0 = 0,
355 SWITCHTEC_ACTIVE_INDEX_1 = 1,
356 SWITCHTEC_ACTIVE_INDEX_NOT_SET = 0xfe
360 enum switchtec_active_index_id bl2;
361 enum switchtec_active_index_id firmware;
362 enum switchtec_active_index_id config;
363 enum switchtec_active_index_id keyman;
364 enum switchtec_active_index_id riot;
367enum switchtec_bl2_recovery_mode {
368 SWITCHTEC_BL2_RECOVERY_I2C = 1,
369 SWITCHTEC_BL2_RECOVERY_XMODEM = 2,
370 SWITCHTEC_BL2_RECOVERY_I2C_AND_XMODEM = 3
373#define TOKEN_RESOURCE_UNLOCK 0
374#define TOKEN_VERSION_UPDATE 1
375#define GEN6_TOKEN_STATIC 2
376#define GEN6_TOKEN_EPHEMERAL 3
378enum secure_token_get_types_e {
379 SECURE_TOKEN_GET_TYPE_STATIC = 0,
380 SECURE_TOKEN_GET_TYPE_EPHEMERAL = 1,
381 SECURE_TOKEN_GET_TYPE_MAX
385 uint8_t kmsk[SWITCHTEC_KMSK_LEN];
389 uint8_t pubkey[SWITCHTEC_PUB_KEY_LEN];
394 uint8_t signature[SWITCHTEC_SIG_LEN];
398 uint8_t token[SWITCHTEC_GEN6_TOKEN_LEN];
402 unsigned char uds[SWITCHTEC_UDS_LEN];
407 float rates[SWITCHTEC_SECURITY_SPI_RATE_MAX_NUM];
412 uint32_t OTP_dword_offset;
413 uint32_t read_dwords;
418int switchtec_security_config_get(
struct switchtec_dev *dev,
void *state);
419int switchtec_security_spi_avail_rate_get(
struct switchtec_dev *dev,
421int switchtec_security_config_set(
struct switchtec_dev *dev,
423int switchtec_mailbox_to_file(
struct switchtec_dev *dev,
int fd);
424int switchtec_active_image_index_get(
struct switchtec_dev *dev,
426int switchtec_active_image_index_set(
struct switchtec_dev *dev,
428int switchtec_fw_exec(
struct switchtec_dev *dev,
429 enum switchtec_bl2_recovery_mode recovery_mode);
430int switchtec_boot_resume(
struct switchtec_dev *dev);
431int switchtec_kmsk_set(
struct switchtec_dev *dev,
435int switchtec_secure_state_set(
struct switchtec_dev *dev,
436 enum switchtec_secure_state state);
437int switchtec_secure_state_set_debug_protect(
struct switchtec_dev *dev);
438int switchtec_secure_state_set_transition(
struct switchtec_dev *dev,
439 enum switchtec_secure_state state);
440int switchtec_dbg_unlock(
struct switchtec_dev *dev, uint32_t serial,
441 uint32_t ver_sec_unlock,
445int switchtec_dbg_unlock_version_update(
struct switchtec_dev *dev,
447 uint32_t ver_sec_unlock,
450int switchtec_dbg_unlock_get_token_gen6(
struct switchtec_dev *dev,
453int switchtec_dbg_unlock_status_get_gen6(
struct switchtec_dev *dev,
454 uint32_t *jtag_status);
455int switchtec_secure_state_get_gen6(
struct switchtec_dev *dev,
456 enum switchtec_secure_state_gen6 *state);
457int switchtec_read_sec_cfg_file(
struct switchtec_dev *dev,
460int switchtec_read_pubk_file(FILE *pubk_file,
struct switchtec_pubkey *pubk);
461int switchtec_read_kmsk_file(FILE *kmsk_file,
struct switchtec_kmsk *kmsk);
462int switchtec_read_signature_file(FILE *sig_file,
465int switchtec_read_uds_file(FILE *uds_file,
struct switchtec_uds *uds);
469int security_settings_get_gen6(
struct switchtec_dev *dev,
478#define DEVICE_CONFIG_SUB_CMD_SET_DEVICE 0x0
479#define DEVICE_CONFIG_SUB_CMD_SET_SECURITY 0x1
480#define DEVICE_CONFIG_SUB_CMD_SET_CUSTOMER 0x2
481#define DEVICE_CONFIG_SUB_CMD_GET 0x3
482#define DEVICE_CONFIG_SUB_CMD_GET_SECURITY 0x4
483#define DEVICE_CONFIG_SUB_CMD_GET_CUSTOMER 0x5
486#define DEVICE_CONFIG_CUSTOMER_FIELD_NUM 4
487#define DEVICE_CONFIG_CUSTOMER_ECC_FIELD_NUM 4
488#define DEVICE_CONFIG_CUSTOMER_ECC_FIELD_SIZE 2
489#define DEVICE_CONFIG_KEY_HASH_SIZE_DWORDS 16
490#define DEVICE_CONFIG_MAX_KEY_SLOTS 12
494 uint32_t twi_ocp_addr :10;
495 uint32_t twi_mrpc_addr :10;
496 uint32_t twi_rcvry_addr_type :2;
497 uint32_t twi_rcvry_bus :2;
504 uint32_t i3c_pid_lo :16;
505 uint32_t i3c_addr_7bit :7;
506 uint32_t i3c_rcvry_bus :2;
512 uint32_t device_id :16;
513 uint32_t vendor_id :16;
516 uint32_t revision_id :16;
517 uint32_t subsystem_id :16;
520 uint32_t subsystem_vendor_id :16;
524 uint32_t customer_fields[DEVICE_CONFIG_CUSTOMER_FIELD_NUM];
527 uint32_t customer_ecc_fields[DEVICE_CONFIG_CUSTOMER_ECC_FIELD_NUM]
528 [DEVICE_CONFIG_CUSTOMER_ECC_FIELD_SIZE];
537 uint32_t hash[DEVICE_CONFIG_KEY_HASH_SIZE_DWORDS];
542 uint32_t command_map :12;
544 uint32_t static_token_disable :1;
545 uint32_t psid_only_token_disable :1;
546 uint32_t uid_only_token_disable :1;
547 uint32_t psid_uid_token_disable :1;
549 uint32_t boot_from_uart_disable :1;
550 uint32_t boot_from_smbus_disable :1;
551 uint32_t boot_from_i3c_disable :1;
552 uint32_t failover_to_uart_disable :1;
553 uint32_t failover_to_smbus_disable :1;
554 uint32_t failover_to_i3c_disable :1;
558 uint32_t psid0[SWITCHTEC_PSID_LEN_DWORDS];
561 uint32_t key_prog_num;
569 uint32_t dok0_status :2;
570 uint32_t dok1_status :2;
571 uint32_t dok2_status :2;
572 uint32_t dok3_status :2;
573 uint32_t dok4_status :2;
574 uint32_t dok5_status :2;
575 uint32_t dok6_status :2;
576 uint32_t dok7_status :2;
577 uint32_t dok8_status :2;
578 uint32_t dok9_status :2;
579 uint32_t dok10_status :2;
580 uint32_t dok11_status :2;
589int switchtec_device_config_get(
struct switchtec_dev *dev,
591int switchtec_device_config_get_security(
struct switchtec_dev *dev,
593int switchtec_device_config_get_customer(
struct switchtec_dev *dev,
595int switchtec_device_config_set_dev(
struct switchtec_dev *dev,
597int switchtec_device_config_set_customer(
struct switchtec_dev *dev,
599int switchtec_device_config_set_security(
struct switchtec_dev *dev,
608#define DOK_CONFIG_SUB_CMD_SIGNATURE 0x0
609#define DOK_CONFIG_SUB_CMD_PROVISION 0x1
610#define DOK_CONFIG_SUB_CMD_REVOKE 0x2
613#define DOK_AUTH_FLAG_UID_ONLY 0x0
614#define DOK_AUTH_FLAG_PSID_ONLY 0x1
615#define DOK_AUTH_FLAG_UID_AND_PSID 0x2
616#define DOK_AUTH_FLAG_NONE 0x3
626 uint8_t sig_data[512];
632 uint32_t key_slot :8;
633 uint32_t auth_type :8;
634 uint32_t reserved :8;
637 uint32_t uid[SWITCHTEC_UID_LEN_DWORDS];
640 uint32_t psid[SWITCHTEC_PSID_LEN_DWORDS];
643 uint32_t key_hash[DEVICE_CONFIG_KEY_HASH_SIZE_DWORDS];
647 uint32_t integrity_hash[DEVICE_CONFIG_KEY_HASH_SIZE_DWORDS];
653 uint32_t key_slot :8;
654 uint32_t auth_type :8;
655 uint32_t reserved :8;
658 uint32_t uid[SWITCHTEC_UID_LEN_DWORDS];
661 uint32_t psid[SWITCHTEC_PSID_LEN_DWORDS];
665 uint32_t integrity_hash[DEVICE_CONFIG_KEY_HASH_SIZE_DWORDS];
668int switchtec_dok_config_signature(
struct switchtec_dev *dev,
670int switchtec_dok_config_key_add(
struct switchtec_dev *dev,
672int switchtec_dok_config_key_revoke(
struct switchtec_dev *dev,
int switchtec_sn_ver_get(struct switchtec_dev *dev, struct switchtec_sn_ver_info *info)
Get serial number and security version.