From b20a41ea788295d0f859265397676d4c3428ca6e Mon Sep 17 00:00:00 2001 From: Eduardo Habkost Date: Tue, 20 Aug 2013 15:09:49 +0200 Subject: [PATCH 070/212] pc: set compat CPUID[0x80000001].EDX bits on Westmere for rhel6.x RH-Author: Eduardo Habkost Message-id: <1377011392-9336-5-git-send-email-ehabkost@redhat.com> Patchwork-id: 53611 O-Subject: [RHEL7 PATCH 4/7] pc: set compat CPUID[0x80000001].EDX bits on Westmere for rhel6.x Bugzilla: 918907 RH-Acked-by: Markus Armbruster RH-Acked-by: Bandan Das RH-Acked-by: Miroslav Rezanina Bugzilla: 918907 Upstream status: not applicable On RHEL-6 the Westmere CPU model has many CPU feature alias bits incorrectly set on CPUID[0x80000001].EDX. This is a RHEL-6 bug (that doesn't cause problems because those bits are documented as reserved on Intel CPUs), but we need to keep exactly the same bits for compatibility on the rhel6.x machine-types. Signed-off-by: Eduardo Habkost --- hw/i386/pc_piix.c | 6 ++++++ 1 file changed, 6 insertions(+) Signed-off-by: Miroslav Rezanina --- hw/i386/pc_piix.c | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index fec4a7d..141497e 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -1031,6 +1031,12 @@ static void pc_init_rhel650(MachineState *machine) x86_cpu_compat_set_features("Penryn", FEAT_1_ECX, CPUID_EXT_X2APIC, 0); x86_cpu_compat_set_features("Nehalem", FEAT_1_ECX, CPUID_EXT_X2APIC, 0); x86_cpu_compat_set_features("Westmere", FEAT_1_ECX, CPUID_EXT_X2APIC, 0); + x86_cpu_compat_set_features("Westmere", FEAT_8000_0001_EDX, + CPUID_EXT2_FXSR | CPUID_EXT2_MMX | CPUID_EXT2_PAT | + CPUID_EXT2_CMOV | CPUID_EXT2_PGE | CPUID_EXT2_APIC | + CPUID_EXT2_CX8 | CPUID_EXT2_MCE | CPUID_EXT2_PAE | CPUID_EXT2_MSR | + CPUID_EXT2_TSC | CPUID_EXT2_PSE | CPUID_EXT2_DE | CPUID_EXT2_FPU, + 0); pc_init_rhel700(machine); } -- 1.7.1